//=====================================================================
//    COPYRIGHT(C) Innobeam
//    ALL RIGHTS RESERVED
//=====================================================================
//Filename    : Wait5ms.v
//Created On  : 2018-12-18
//Author      : Chao
//Description :	SPI master for EPD
//Include     : 
//Modification: 
//=====================================================================
module Wait1s(
	iClk,
	iRst_n,
	
	iWait5msStart,
	oWait5msDone
	);
//========================================================================
//    parameter
//========================================================================


//========================================================================
//    port
//========================================================================	
	input 				iClk;
	input 				iRst_n;
	input					iWait5msStart;
	output				oWait5msDone;
//========================================================================
//    signal
//========================================================================	
	reg					oWait5msDone;
	reg [31:0]			Cnt;
	
//logic
	always@(posedge iClk or negedge iRst_n)begin
		if(!iRst_n)begin
			Cnt <= 32'd0;
			oWait5msDone <= 1'b0;
			end
		else begin
			if(Cnt==32'b0) begin
				if(iWait5msStart) begin
					Cnt <= 32'd1;
					oWait5msDone <= 1'b0;
					end
				else begin
					Cnt <= Cnt;
					oWait5msDone <= 1'b0;
					end
				end
			else if (Cnt < 32'd1250000) begin
					Cnt <= Cnt + 32'd1;
					oWait5msDone <= 1'b0;
					end
			else begin
				Cnt <= 32'd0;
				oWait5msDone <= 1'b1;
				end
			end
		end
	
endmodule